UART_TX Project Status | |||
Project File: | UART_TX.xise | Parser Errors: | No Errors |
Module Name: | UART_TX | Implementation State: | Programming File Generated |
Target Device: | xc3s400-5pq208 |
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No Errors |
Product Version: | ISE 14.7 |
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1 Warning (0 new) |
Design Goal: | Balanced |
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All Signals Completely Routed |
Design Strategy: | Xilinx Default (unlocked) |
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All Constraints Met |
Environment: | System Settings |
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0 (Timing Report) |
Device Utilization Summary | [-] | ||||
Logic Utilization | Used | Available | Utilization | Note(s) | |
Number of Slice Flip Flops | 20 | 7,168 | 1% | ||
Number of 4 input LUTs | 18 | 7,168 | 1% | ||
Number of occupied Slices | 25 | 3,584 | 1% | ||
Number of Slices containing only related logic | 25 | 25 | 100% | ||
Number of Slices containing unrelated logic | 0 | 25 | 0% | ||
Total Number of 4 input LUTs | 42 | 7,168 | 1% | ||
Number used as logic | 18 | ||||
Number used as a route-thru | 24 | ||||
Number of bonded IOBs | 3 | 141 | 2% | ||
Number of BUFGMUXs | 1 | 8 | 12% | ||
Average Fanout of Non-Clock Nets | 2.17 |
Performance Summary | [-] | |||
Final Timing Score: | 0 (Setup: 0, Hold: 0) | Pinout Data: | Pinout Report | |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
Timing Constraints: | All Constraints Met |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | سه شنبه 11. آوريل 18:06:21 2017 | 0 | 1 Warning (0 new) | 0 | |
Translation Report | Current | سه شنبه 11. آوريل 18:06:27 2017 | 0 | 0 | 0 | |
Map Report | Current | سه شنبه 11. آوريل 18:06:33 2017 | 0 | 0 | 2 Infos (0 new) | |
Place and Route Report | Current | سه شنبه 11. آوريل 18:06:41 2017 | 0 | 0 | 2 Infos (0 new) | |
Power Report | ||||||
Post-PAR Static Timing Report | Current | سه شنبه 11. آوريل 18:06:45 2017 | 0 | 0 | 6 Infos (0 new) | |
Bitgen Report | Current | سه شنبه 11. آوريل 18:06:51 2017 | 0 | 0 | 1 Info (0 new) |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Report | Current | سه شنبه 11. آوريل 18:06:51 2017 | |
WebTalk Log File | Current | سه شنبه 11. آوريل 18:06:56 2017 |